Computer architecture cse2018 - Chapter 1: Introduction

Nội dung text: Computer architecture cse2018 - Chapter 1: Introduction

1. dce 2017 Chapter 1 Introduction Computer Architecture – Chapter 1 © Fall 2017 2
2. dce 2017 Welcome to CA CSE • Instructor: Võ Tấn Phương  Email: vtphuong@cse.hcmut.edu.vn • TA: Trần Thanh Bình  Email: thanhbinh.hcmut@gmail.com • Course Web Page: – Computer Architecture – Chapter 1 © Fall 2017 4
3. dce 2017 Estimated Schedule • Introduction, Performance (2 week) • Integer arithmetic, Floating Point Numbers (1 week) • MIPS Instruction Set Architecture (3 weeks) • MIPS Assembly Programming (1 weeks) • Basic Digital Function Block, ALU (1 week) • Single Cycle MIPS Processor (2 weeks) • Pipelined MIPS Processor (2 weeks) • Memory System (1 week) • Cache Memory System (2 week) Computer Architecture – Chapter 1 © Fall 2017 6
4. dce 2017 Tentative Grading Policy • Labs & Assignment 40% – 2 Assignments 30% – Exercises 10% • Mid Exam 20% – Quiz questions, closed book • Final Exam 40% – Quiz questions, closed book • Bonus by white board quick exercises (max + 2) Computer Architecture – Chapter 1 © Fall 2017 8
5. dce 2017 Presentation Outline • Welcome to CA CSE • Computer Architectures and Trends • High-Level, Assembly-, and Machine-Languages • Components of a Computer System • Chip Manufacturing Process • Programmer's View of a Computer System Computer Architecture – Chapter 1 © Fall 2017 10
6. dce 2017 Computer Architecture In Context Computer Architecture – Chapter 1 © Fall 2017 12
7. dce 2017 Trend 2: Software trend • No longer just executing C/FORTRAN code • Object Oriented Programming • Java • Architectural features to assist security • Middleware – Layer(s) between client and server applications – Hides complexity of client/server communications Computer Architecture – Chapter 1 © Fall 2017 14
8. dce 2017 Emerging Device Technologies Computer Architecture – Chapter 1 © Fall 2017 16
9. dce 2017 Transition to Multicore Processors Computer Architecture – Chapter 1 © Fall 2017 18
10. dce 2017 Classes of Computers • Desktop / Notebook Computers – General purpose, variety of software – Subject to cost/performance tradeoff • Server Computers – Network based – High capacity, performance, reliability – Range from small servers to building sized • Embedded Computers – Hidden as components of systems – Stringent power/performance/cost constraints Computer Architecture – Chapter 1 © Fall 2017 20
11. dce 2017 Microprocessor Sales • ARM processor sales exceeded Intel IA-32 processors, which came second • ARM processors are used mostly in cellular phones • Most processors today are embedded in cell phones, digital TVs, video games, and a variety of consumer devices Computer Architecture – Chapter 1 © Fall 2017 22
12. dce 2017 Some Important Questions to Ask • What is Assembly Language? • What is Machine Language? • How is Assembly related to a high-level language? • Why Learn Assembly Language? • What is an Assembler, Linker, and Debugger? Computer Architecture – Chapter 1 © Fall 2017 24
13. dce 2017 Assembly and Machine Language • Machine language – Native to a processor: executed directly by hardware – Instructions consist of binary code: 1s and 0s • Assembly language – Slightly higher-level language – Readability of instructions is better than machine language – One-to-one correspondence with machine language instructions • Assemblers translate assembly to machine code • Compilers translate high-level programs to machine code – Either directly, or – Indirectly via an assembler Computer Architecture – Chapter 1 © Fall 2017 26
14. dce 2017 Translating Languages Program (C Language): swap(int v[], int k) { A statement in a high-level int temp; language is translated temp = v[k]; typically into several v[k] = v[k+1]; machine-level instructions v[k+1] = temp; } Compiler MIPS Assembly Language: MIPS Machine Language: 00051080 sll $2,$5, 2 Assembler add $2,$4,$2 00821020 lw $15,0($2) 8C620000 lw $16,4($2) 8CF20004 sw $16,0($2) ACF20000 sw $15,4($2) AC620004 jr $31 03E00008 Computer Architecture – Chapter 1 © Fall 2017 28
15. dce 2017 Why Learn Assembly Language? • Many reasons: – Accessibility to system hardware – Space and time efficiency – Writing a compiler for a high-level language • Accessibility to system hardware – Assembly Language is useful for implementing system software – Also useful for small embedded system applications • Space and Time efficiency – Understanding sources of program inefficiency – Tuning program performance – Writing compact code Computer Architecture – Chapter 1 © Fall 2017 30
16. dce 2017 Assemble and Link Process Source Object File Assembler File Source Object Executable Assembler Linker File File File Source Object Link File Assembler File Libraries A program may consist of multiple source files Assembler translates each source file separately into an object file Linker links all object files together with link libraries Computer Architecture – Chapter 1 © Fall 2017 32
17. dce 2017 Presentation Outline • Welcome to CA CSE • Computer Architectures and Trends • High-Level, Assembly-, and Machine-Languages • Components of a Computer System • Chip Manufacturing Process • Programmer's View of a Computer System Computer Architecture – Chapter 1 © Fall 2017 34
18. dce 2017 How do Components Connect Computer Architecture – Chapter 1 © Fall 2017 36
19. dce 2017 Input Devices Key Cap c d e f 8 9 a b Conductor-coated membrane Spring 4 5 6 7 Mechanical switch 0 1 2 3 Contacts Logical arrangement of keys Membrane switch Computer Architecture – Chapter 1 © Fall 2017 38
20. dce 2017 Memory Devices • Volatile Memory Devices – RAM = Random Access Memory – DRAM = Dynamic RAM • 1-Transistor cell + capacitor • Dense but slow, must be refreshed • Typical choice for main memory – SRAM: Static RAM • 6-Transistor cell, faster but less dense than DRAM • Typical choice for cache memory • Non-Volatile Memory Devices – ROM = Read Only Memory – Flash Memory Computer Architecture – Chapter 1 © Fall 2017 40
21. dce 2017 Magnetic Disk Storage Disk Access Time = Seek Time + Rotation Latency + Transfer Time Read/write head Sector Actuator Recording area Track 2 Track 1 Seek Time: head movement to the Track 0 desired track (milliseconds) Arm Rotation Latency: disk rotation until desired sector arrives under the head Direction of Platter rotation Transfer Time: to transfer data Spindle Computer Architecture – Chapter 1 © Fall 2017 42
22. dce 2017 Inside the Processor (CPU) • Datapath: part of a processor that executes instructions • Control: generates control signals for each instruction Next Program Clock Counter A Instruction Data Registers L Cache U Cache Instruction Program Counter Program Control Computer Architecture – Chapter 1 © Fall 2017 44
23. dce 2017 Fetch - Execute Cycle Fetch instruction Instruction Fetch Compute address of next instruction Generate control signals for instruction Instruction Decode Read operands from registers Execute Compute result value Memory Access Read or write memory (load/store) Writeback Result Writeback result in a register Infinite Cycle in implemented Cycle Hardware Infinite Computer Architecture – Chapter 1 © Fall 2017 46
24. dce 2017 Presentation Outline • Welcome to CA CSE • Computer Architectures and Trends • High-Level, Assembly-, and Machine-Languages • Components of a Computer System • Chip Manufacturing Process • Programmer's View of a Computer System Computer Architecture – Chapter 1 © Fall 2017 48
25. dce 2017 Wafer of Pentium 4 Processors • 8 inches (20 cm) in diameter • Die area is 250 mm2 – About 16 mm per side • 55 million transistors per die – 0.18 μm technology – Size of smallest transistor – Improved technology uses • 0.13 μm and 0.09 μm • Dies per wafer = 169 – When yield = 100% – Number is reduced after testing – Rounded dies at boundary are useless Computer Architecture – Chapter 1 © Fall 2017 50
26. dce 2017 Presentation Outline • Welcome to CA CSE • Computer Architectures and Trends • High-Level, Assembly-, and Machine-Languages • Components of a Computer System • Chip Manufacturing Process • Programmer's View of a Computer System Computer Architecture – Chapter 1 © Fall 2017 52
27. dce 2017 Programmer's View – 2 • Application Programs (Level 5) – Written in high-level programming languages – Such as Java, C++, Pascal, Visual Basic . . . – Programs compile into assembly language level (Level 4) • Assembly Language (Level 4) – Instruction mnemonics are used – Have one-to-one correspondence to machine language – Calls functions written at the operating system level (Level 3) – Programs are translated into machine language (Level 2) • Operating System (Level 3) – Provides services to level 4 and 5 programs – Translated to run at the machine instruction level (Level 2) Computer Architecture – Chapter 1 © Fall 2017 54